Next-Gen, High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Qualcomm is seeking a Senior ASIC Design Engineer to architect, design, and deploy next-generation high-speed HBM/LPDDR/DDR memory subsystems. This role involves RTL coding, debugging, synthesis, and timing closure for QCT products, interfacing with CPUs, GPUs, and DSPs.
Responsibilities
- Architect, design (RTL coding), and deploy next generation, high-speed memory subsystems.
- Develop and contribute to architecture and design specifications.
- Drive the micro-architecture of logic design portions.
- Implement and deliver RTL.
- Work with verification engineers to deliver high-quality designs.
- Debug designs and provide debug support when integrated into the chip.
- Perform synthesis, timing closure, physical design support, gate-level simulations, and power analysis.
- Contribute to the improvement of design methodology for productivity and quality.
Requirements
- Bachelor's or Master's degree in Science, Engineering, or related field.
- 5+ years ASIC design, RTL coding, front-end digital design experience.
- 3+ years Hardware Architecture experience.
- Experience with LPDDR memory and cache controller, NoC based architectures, especially the front end interfacing to the CPU, DSP, and multimedia processors.
- Exposure to HBM memory type designs.
- On-chip tightly coupled SRAM & L3 cache controller architecture/design.
- Experience with x86 or ARM CPU/bus architectures.
- Experience with ordering of memory transactions and methods to enforce proper ordering to conform to ISA architecture specification.
Desired Qualifications
- Bachelors degree in Electrical or Computer Engineering and at least 5+ years of experience in high speed digital design.
- Master's degree preferred.
- Exposure to RTL Design Verification flows is a plus.
- 3-10 years of ASIC design (RTL coding) preferred.
- 3+ years of direct Hardware Architecture experience.
Benefits
- Competitive annual discretionary bonus program.
- Opportunity for annual RSU grants.
- Highly competitive benefits package designed to support success at work, at home, and at play.
- Relocation assistance may be available.
#ASIC#Digital Design#HBM#LPDDR#Memory Subsystem#RTL#Hardware Architecture