The Job

LPASS Design Verification Sr Engineer

Technology, Data & Digital · Software & Web Development · Software Engineering

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In short

Qualcomm is hiring a Senior LPASS Design Verification Engineer in Bangalore, India, to take ownership of features within the Low Power Audio Subsystem (LPASS). This role involves developing robust testbenches, exploring innovative DV methodologies, and ensuring bug-free silicon for cutting-edge Snapdragon devices.

Responsibilities

  • DV ownership of one or more features in the Low power audio subsystem (LPASS) core.
  • Developing a robust testbench, optimized for the specific feature/DUT.
  • Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches and process improvements.
  • Ensure a bug free silicon for Tape Out which eventually leads to a superb user experience of Snapdragon based computing devices.

Requirements

  • Minimum 1 - 2 years of VLSI industry experience.
  • Strong debugging and analytical skills.
  • Strong knowledge of HDLs like Verilog, System Verilog.
  • Proficiency in developing SV/UVM based test benches.
  • Proficient in debugging RTL/TB issues using Verdi or similar tools.
  • Proficient with scripting languages such as Perl and(or) Python.

Desired Qualifications

  • Knowledge of UPF, low power architecture.
#LPASS#Design Verification#Hardware Engineering#VLSI
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Company

Qualcomm

Job Posted

1 week ago

Employment Type

Full Time

WorkMode

On Site

Experience Level

Senior

Locations

Bangalore, India

Qualification

Bachelor, Master, Doctoral

Applicants

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