GPU (RTL) Design - Sr Lead
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Qualcomm is seeking a Sr. Lead GPU (RTL) Design Engineer with 4-8 years of experience in ASIC RTL Design. Responsibilities include logic design, micro-architecture, RTL coding, and integration of complex multi-clock domain blocks, utilizing Verilog/System-Verilog and knowledge of AMBA protocols. Experience with design tools like Lint, CDC, Design Compiler, and Primetime is essential.
Responsibilities
- Logic design/micro-architecture/RTL coding
- Design and integration of complex multi clock domain blocks
- Work closely with the Design verification and validation teams for pre/post Silicon debug
Requirements
- Minimum 4 to 8 years of work experience in ASIC RTL Design
- Hands on experience with design and integration of complex multi clock domain blocks
- Experience in Verilog/System-Verilog is a must
- Knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architecture
- Hands on experience in Multi Clock designs, Asynchronous interface is a must
- Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required
- Experience in Synthesis / Understanding of timing concepts for ASIC is must
Desired Qualifications
- Understanding of Memory controller designs and microprocessors is an added advantage
- Hands on experience in Low power design is preferable
#GPU#RTL#Design#Sr Lead#Hardware Engineering#ASIC