Front-End Implementation Engineer (Staff)
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
QT Technologies is looking for a Front-End Implementation Engineer in Cork, Ireland, to work on top-level timing constraints, physical synthesis, formal verification, and functional ECOs for Snapdragon SoCs. The role requires a Bachelor's or Master's degree in Electronics or Computer Engineering with 5-10 years of experience in synthesis, timing closure, and verification.
Responsibilities
- Work on the creation of top-level timing constraints, physical synthesis, formal verification and functional ECOs.
- Drive and execute on all phases of the design flow for Snapdragon SoCs at the core and chip-level in 4nm and below technology.
- Develop timing constraints in TCL for Synopsys tools.
- Perform formal verification, Functional/Timing ECO Implementation.
- Develop Verilog RTL design.
- Perform UPF, Low power checks.
Requirements
- Bachelors/Masters in Electronics or Computer Engineering and 5 to 10 years’ experience.
- Logical/Physical synthesis, DFT implementation, timing closure in STA.
- Timing constraint capture in TCL for Synopsys tools.
- Formal verification, Functional/Timing ECO Implementation.
- Verilog RTL design.
- UPF, Low power checks.
- Masters in Electronics or Computer Engineering plus a minimum 5 years of experience.
- Timing constraint development for large complex SoC devices.
- TCL script development.
- TCL/PERL/Python script development for CAD design flows.
- Physical synthesis.
- Formal verification, UPF, Low power checks, Static Timing Analysis.
- Good understanding of Design for test concepts.
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
- OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
- OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Desired Qualifications
- Equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
Benefits
- Salary, stock and performance related bonus
- Maternity/Paternity Leave
- Employee stock purchase scheme
- Matching pension scheme
- Education Assistance
- Relocation and immigration support (if needed)
- Life, Medical, Income and Travel Insurance
- Subsidised memberships for physical and mental well-being
- Bicycle purchase scheme
- Employee run clubs, including, running, football, chess, badminton + many more
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