Field Application Engineer, Verification

Technology, Data & Digital · Software & Web Development · Software Engineering · QA & Testing

In short

Synopsys is seeking a Field Application Engineer, Verification in Bengaluru, India. This role involves directly supporting semiconductor design teams, debugging complex RTL signoff issues, and leading technical engagements to ensure customer project success. The ideal candidate has 3-5 years of experience in ASIC verification and a strong command of VHDL, Verilog, and SystemVerilog.

Responsibilities

  • Work directly with semiconductor design teams to deploy and optimize Synopsys verification solutions.
  • Debug complex RTL signoff issues including CDC, lint, RDC, and low power UPF conflicts.
  • Partner with Synopsys R&D and product validation teams to develop new flows and drive tool enhancements.
  • Lead technical engagements onsite or remote, ensuring customers hit verification milestones.
  • Gather customer feedback and translate it into flow improvements.
  • Coordinate with account managers to shape customer strategies and support business growth.
  • Train customer engineering teams on verification methodologies and best practices.

Requirements

  • BE/BTech/ME/MTech in Electronics Engineering, Computer Science, or Microelectronics.
  • 3-5 years of hands-on industry experience in ASIC design or verification.
  • Strong command of VHDL, Verilog, and SystemVerilog RTL.
  • Solid understanding of ASIC design and verification flows from RTL to tapeout.
  • Proven experience with RTL signoff flows (linting, CDC, RDC, property checking).
  • Hands-on work with low power verification techniques using UPF or CPF.
  • Experience debugging power intent issues in real designs.
  • Exposure to simulation and verification methodologies (directed tests, constrained random testing, assertions, coverage-driven verification, GLS).
  • Comfort working in ambiguity and developing clear technical plans.

Desired Qualifications

  • Working knowledge of Synopsys EDA tools such as VC SpyGlass, VCS, VC LP, VC Formal, FishTail, or Verdi is a strong plus.
  • Ability to sketch out solution approaches on a whiteboard.
  • Proactively create minimal reproducible test cases and propose workarounds for tool issues.
  • Effectively coordinate with global teams and time zones.
  • Ability to explain complex CDC violations or formal proof failures clearly.
  • Build relationships by being reliable and delivering on commitments.
  • Curiosity about advancements in chip design, AI workloads, automotive safety, and advanced nodes.

Benefits

  • Comprehensive range of health, wellness, and financial benefits.
  • Total rewards include monetary and non-monetary offerings.
  • Opportunity to work with semiconductor teams building chips that power AI, automotive, mobile, and cloud infrastructure.
  • Contribute to methodologies that scale across the business.
#verification#RTL#signoff#CDC#low power#formal verification#ASIC#EDA
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Company

Synopsys Inc

Job Posted

2 weeks ago

Employment Type

Full Time

WorkMode

Hybrid

Experience Level

Mid-Senior

Locations

Bengaluru, India

Qualification

Bachelor, Master

Applicants

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