Applications Engineering, Principal Engineer-STA
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
Principal Applications Engineer with extensive experience in silicon timing and Synopsys PrimeTime. Responsibilities include driving customer adoption, providing training, supporting tape-outs, and collaborating with R&D. This role is crucial for accelerating customer tape-out schedules and influencing product roadmaps.
Responsibilities
- Drive PrimeTime adoption and usage with customers, including competitive benchmarking, proof-of-concept runs, and technical win strategies.
- Deliver hands-on customer training on Static Timing Analysis workflows, timing closure techniques, process variation analysis, and signal integrity debugging using PrimeTime.
- Provide tape-out support for customer designs, troubleshooting timing violations, setup/hold issues, and corner-case scenarios in real production environments.
- Collaborate with R&D to communicate customer requirements, report tool issues, and drive product enhancements based on field deployment feedback.
- Work closely with sales, marketing, and field teams to articulate PrimeTime's technical advantages to design teams and engineering management.
- Develop and refine TCL-based automation scripts and methodologies that improve customer productivity and timing closure efficiency.
- Support customers through the full design flow, interfacing with synthesis, physical design, extraction, and ECO processes to ensure seamless PrimeTime integration.
Requirements
- Bachelor's degree in Electrical Engineering or equivalent, with 10+ years of hands-on experience in ASIC/SoC design, timing analysis, or related fields, or Master's degree with 8+ years of experience.
- Deep working knowledge of Synopsys PrimeTime, including hands-on experience running STA, analyzing timing reports, and debugging violations in real customer designs.
- Solid understanding of timing corners, process variations, on-chip variation (OCV), advanced OCV (AOCV), statistical STA, and signal integrity effects on timing.
- Familiarity with the broader digital design flow, including synthesis, place and route, parasitic extraction, and ECO methodologies.
- Strong TCL scripting skills for automation, flow customization, and productivity improvements.
- Demonstrated ability to communicate complex technical concepts clearly to both engineering teams and management, prior customer-facing experience is a strong plus.
- Willingness to travel to customer sites as needed for training, support, and technical engagements.
Desired Qualifications
- Ability to walk into a customer meeting with a timing report full of violations and walk out with a clear action plan that the design team trusts and can execute.
- Comfortable pushing back on customer requests when the real problem is upstream in their methodology, and knowing how to have that conversation without burning the relationship.
- Comfortable context-switching between a competitive benchmark for a prospect, a tape-out crisis call with an existing customer, and a product enhancement discussion with R&D, all in the same week.
- Treating customer problems like they are your own to genuinely see the design succeed.
- Ability to explain a nuanced timing tradeoff to an engineering director in two sentences without losing technical accuracy.
- Staying current on process technology trends, design challenges, and timing methodologies.
Benefits
- Comprehensive range of health, wellness, and financial benefits.
- Total rewards include both monetary and non-monetary offerings.
- Opportunity to work with the team behind the industry-leading STA tool.
- Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
#STA#Silicon Timing#PrimeTime#Timing Violations#Signal Integrity