Applications Engineering
Technology, Data & Digital · Software & Web Development · Software Engineering
In short
As an Applications Engineer at Synopsys, you will deploy and optimize Prime Power RTL 2.0 for customers, ensuring accurate RTL power analysis in their chip design flows. This role requires deep debugging skills and the ability to independently manage customer engagements, directly impacting product development and customer success in AI and SoC design.
Responsibilities
- Lead Prime Power RTL 2.0 evaluations and production deployments from scoping through go-live, including methodology selection, flow customization, and customer knowledge transfer
- Deploy and tune logical flows using CGE, lint, and ODC, physical flows with RTLA and glitch/SDF integration, and hybrid NDM import flows across customer design environments
- Apply WCDF-based calibration and synthesize with apply_calib to improve RTL-to-signoff correlation when designs demand tighter accuracy, and guide customers on FSDB stimulus quality and coverage
- Independently troubleshoot elaboration failures, library mismatches, SDC constraints, FSDB parsing issues, multi-rail UPF problems, and power accuracy gaps across VCS, Verdi, PrimeTime, and RTL Architect
- Present flow options, CGE/CGR/DACGE results, and deployment timelines to customer engineering teams and manage project deliverables through completion
- Develop Tcl-based automation for staged save/restore methodologies, custom reporting, and flow integration that fits into customer regression environments
- Mentor Level 1 and Level 2 Applications Engineers, contribute to internal playbooks and best practices, and provide R&D feedback based on field deployment patterns
Requirements
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 5+ years in EDA applications, IC design, or low-power methodology, or Master's degree with 3+ years
- Hands-on experience deploying RTL power analysis tools in customer or production environments, with working knowledge of CGE, glitch analysis, and memory power modeling
- Proficiency with VCS, Verdi, FSDB waveform formats, SDC constraint flows, and Tcl scripting for EDA tool automation
- Demonstrated ability to independently manage customer-facing technical projects from kickoff through delivery, including timeline management and stakeholder communication
Desired Qualifications
- Experience with Prime Power RTL 2.0, RTL Architect, Fusion Compiler, or NDM-based design flows is a strong plus
- Familiarity with PrimeTime PX signoff correlation, UPF/IEEE 1801 multi-rail analysis, or SoC and AI accelerator design methodologies is a strong plus
- Prior Applications Engineering role at an EDA vendor or customer-facing technical role at a semiconductor company is a strong plus
Benefits
- Comprehensive range of health, wellness, and financial benefits
- Total rewards include both monetary and non-monetary offerings
- Eligible for an annual bonus, equity, and other discretionary bonuses
- Competitive total rewards package
#Applications Engineering#EDA#IC design#low-power methodology#RTL power analysis#SoC#AI accelerator