Analog Design, Staff Engineer
Technology, Data & Digital · Software & Web Development · Software Engineering · Embedded Systems
In short
Synopsys is seeking an experienced Analog Design, Staff Engineer in Hyderabad, India, to design advanced Multi-Gbps SERDES IP. The role requires over a decade of analog circuit design experience, including FinFET nodes and high-speed SerDes standards, with a focus on driving architectural direction and mentoring junior engineers.
Responsibilities
- Review high-speed SerDes standards (PCIe, Ethernet, USB, CXL) and translate them into transceiver architectures and detailed sub-block specifications for Multi-Gbps NRZ and PAM4 designs
- Architect and design analog/mixed-signal circuits including TX drivers, RX front-ends, adaptive equalizers, PLLs, DLLs, bandgap references, regulators, oscillators, and ADC/DAC blocks for advanced FinFET and gate-all-around process nodes
- Collaborate with digital design teams on analog/digital co-design, calibration loops, adaptation algorithms, and timing handoff to ensure seamless integration and optimal performance
- Work directly with layout engineers to guide physical implementation, minimize parasitics, manage device stress and process variation, and ensure robust post-silicon performance
- Present simulation results, design trade-offs, and architectural decisions in internal reviews, customer meetings, and industry panel discussions
- Document design features, simulation methodologies, test plans, and characterization results, and support post-silicon bring-up and debug with electrical analysis and design iteration proposals
- Analyze customer silicon data and field performance to identify improvement opportunities and drive post-silicon design updates for next-generation IP releases
Requirements
- MTech/MS with 4+ years or BTech/BS with 5+ years of hands-on analog IC design experience in Electrical Engineering, Computer Engineering, or a related field
- Proven track record of CMOS tape-outs in FinFET technologies with demonstrable experience in Multi-Gbps high-speed designs using NRZ and PAM4 modulation
- Deep expertise in SERDES sub-circuit design including TX drivers, RX front-ends, adaptive equalizers, PLLs, DLLs, bandgap references, regulators, oscillators, and data converters
- Strong understanding of analog/digital co-design, calibration and adaptation algorithms, and timing handoff between analog and digital domains
- Proficiency with schematic entry, physical layout collaboration, design verification tools, and SPICE simulators (Spectre, HSPICE, or similar)
- Experience with scripting languages such as TCL, PERL, or MATLAB for post-processing simulation data and automating design tasks
- Solid grounding in system-level budgeting for jitter, amplitude, and noise, and familiarity with signal integrity challenges including packaging parasitics, crosstalk, and channel loss
Desired Qualifications
- Experience with ESD protection, custom digital design, and design-for-reliability considerations (electromigration, IR drop, aging, self-heating) is a plus.
- Ability to pinpoint architectural bottlenecks in design reviews quickly
- Willingness to push back on specifications or layout decisions with data and alternatives
- Skill in debugging circuits across domains when simulation does not match silicon
- Commitment to writing clear, thorough documentation
- Keeps current with emerging process technologies, circuit techniques, and industry standards
- Values collaboration and knowledge-sharing, explaining complex trade-offs effectively
Benefits
- Comprehensive medical and healthcare plans
- ETO and FTO Programs for time away
- Maternity and paternity leave, parenting resources, adoption and surrogacy assistance
- ESPP with a 15% discount and a 24-month look-back
- Retirement plans (vary by region and country)
- Competitive salaries
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Company
Synopsys Inc
Job Posted
1 week ago
Employment Type
Full Time
WorkMode
On Site
Experience Level
Executive
Locations
Hyderabad, India
Qualification
Master, Bachelor
Applicants
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